MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 4

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Revision History
Revision History
4
(Continued)
September,
August,
August,
2001
2001
2002
2006
Date
May,
Revision
Level
4
5
6
7
12.11.3 Data Direction Register for Timer Port — Repetitive information
removed. See 12.11.2 Timer Port Data Direction Register
18.12 Control Timing — Minimum values added for PW
18.14 Non-Multiplexed Expansion Bus Timing — Table heading changed to
reflect minimum and maximum values at 8 MHz
Table 12-3. Prescaler Selection — Added value column and updated prescale
factors
18.11 EEPROM Characteristics — Corrected minimum and maximum values
for programming and erase times
Figure 1-3. Expanded Wide Mode SRAM Expansion Schematic — On sheet
1 of this schematic removed reference to resistor R2
Figure 1-4. Expanded Narrow Mode SRAM Expansion Schematic — On
sheet 1 of this schematic removed reference to resistor R2
4.6.2 External Reset — Corrected reference to eight E-clock cycles to nine
E-clock cycles
Updated to meet Freescale identity guidelines.
1.3 Ordering Information
added
Figure 1-4. Expanded Wide Mode SRAM Expansion Schematic (Sheet 1 of 3)
— Updated sheet 1 and corrected title for sheets 2 and 3.
Figure 1-5. Expanded Narrow Mode SRAM Expansion Schematic (Sheet 1 of 3)
— Updated sheet 1 and corrected title for sheets 2 and 3.
Figure 3-9. Condition Code Register (CCR)
Table 4-1. Interrupt Vector Map
4.5 Resets
Figure 5-1. Mode Register (MODE)
Peripheral to Special peripheral.
Figure 10-3. Clock Function Register Map
Reset for the COP Control Register.
Figure 10-9. COP Control Register (COPCTL)
12.4.1 Prescaler
Figure 12-17. Timer Mask 2 Register (TMSK2)
Table 16-5. ATD Interrupt Sources
18.2 Functional Operating Range
entries.
18.10 EEPROM Characteristics
programming clock frequency.
18.11 Control Timing
18.12 Peripheral Port Timing
19.2 Package Dimensions
latest available.
Figure 1-1. Device Numbering
— Reworked paragraph for clarity.
MC68HC812A4 Data Sheet, Rev. 7
— Corrected number of prescaler divides.
— Corrected maximum value for frequency of operation.
— Updated
— Replaced package dimension drawing with the
— Corrected table heading.
— Corrected reference to clock monitor reset.
— Corrected minimum value for minimum
Description
— Corrected operating temperature range
— Corrected table title.
— Changed reset state designator from
Table 1-1. Ordering Information
System.
— Removed reference to Special
— Corrected reset state for bit 7.
— Corrected reset states.
— Corrected reset state for bit 4.
IRQ
and PW
TIM
and
Freescale Semiconductor
Throughout
Number(s)
Page
209
329
334
197
328
102
107
122
131
207
222
226
227
231
237
40
42
77
18
24
26
46
50
52
58