MC812A4CPVE8 Freescale Semiconductor, MC812A4CPVE8 Datasheet - Page 90

• Manufacturer Part Number: MC812A4CPVE8
• Description: IC MCU 16BIT EEPROM 4K 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC812A4CPVE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 83
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC812A
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Controller Family/series: 68HC12
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Memory Expansion and Chip-Select
CS0E — Chip-Select 0 Enable Bit
8.6.2 Chip-Select Control Register 1
Read: Anytime
Write: Anytime
CSP1FL — Program Chip-Select 1 Covers Full Map
CSPA21 — Program Chip-Select Split Based on ADDR21
CSDHF — Data Chip-Select Covers Half the Map
CS3EP — Chip-Select 3 Follows Extra Page
90
CS1, CS2, and CS3 have higher precedence and can override CS0 for portions of this space.
Setting this bit allows two 2-Mbyte memories to make up the 4-Mbyte addressable program space.
Since ADDR21 is always one in the unpaged $C000 to $FFFF space, CSP0 is active in this space.
1 = Enables this chip-select which covers a 512-byte space following the register space
0 = Disables this chip-select
1 = If CSPA21 is cleared, chip-select program 1 covers the entire memory map. If CSPA21 is set,
0 = If CSPA21 is cleared, chip-select program 1 covers half the map, $8000 to $FFFF. If CSPA21
1 = Program chip-selects are both active (if enabled) for space $8000 to $FFFF; CSP0 if ADDR21
0 = CSP0 and CSP1 do not rely on ADDR21.
1 = Data chip-select covers half the memory map ($0000 to $7FFF) including the optional data page
0 = Data chip-select covers only $7000 to $7FFF (the optional data page window).
1 = Chip-select 3 follows accesses to the 1-Kbyte extra page ($0400 to $07FF or $0000 to $03FF).
0 = Chip-select 3 includes only accesses to a 128-byte space following the register space.
($x200–$x3FF or $xA00–$xBFF)
this bit has no meaning or effect.
is set, this bit has no meaning or effect.
is set and CSP1 if ADDR21 is cleared.
window ($7000 to $7FFF).
Any accesses to this window cause the chip-select to go active. (EWEN must be set to 1.)
Address: $003D
Reset:
Read:
Write:
Bit 7
Figure 8-17. Chip-Select Control Register 1 (CSCTL1)
0
0
= Unimplemented
CSP1FL
6
0
MC68HC812A4 Data Sheet, Rev. 7
CSPA21
5
0
CSDHF
4
0
CS3EP
3
0
2
0
0
1
0
0
Freescale Semiconductor
Bit 0
0
0