PIC18LF27J53-I/ML Microchip Technology, PIC18LF27J53-I/ML Datasheet - Page 309

• Manufacturer Part Number: PIC18LF27J53-I/ML
• Description: IC PIC MCU 128KB FLASH 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF27J53-I/ML

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 2.75 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Digital Ic Case Style: QFN
• Supply Voltage Range: 1.8V To 3.6V
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

EXAMPLE 20-2:
 2010 Microchip Technology Inc.
;
;DestBuf
;
;SrcBuf
;
PrepareTransfer:
BeginXfer:
movlw
movwf
movlw
movwf
movlw
movwf
movlw
movwf
movlw
movwf
movlw
movwf
bsf
;Execute whatever
udata
res
res
HIGH(DestBuf)
RXADDRH
LOW(DestBuf)
RXADDRL
HIGH(SrcBuf)
TXADDRH
LOW(SrcBuf)
TXADDRL
0x01
DMABCH
0xFF
DMABCL
DMACON1, DMAEN
512-BYTE SPI MASTER MODE Init AND TRANSFER (CONTINUED)
0x500
0x200
0x200
;Somewhere else in our project, lets assume we have
;allocated some RAM for use as SPI receive and
;transmit buffers.
;Let’s reserve 0x500-0x6FF for use as our SPI
;receive data buffer in this example
;Lets reserve 0x700-0x8FF for use as our SPI
;transmit data buffer in this example
;Get high byte of DestBuf address (0x05)
;Load upper four bits of the RXADDR register
;Get low byte of the DestBuf address (0x00)
;Load lower eight bits of the RXADDR register
;Get high byte of SrcBuf address (0x07)
;Load upper four bits of the TXADDR register
;Get low byte of the SrcBuf address (0x00)
;Load lower eight bits of the TXADDR register
;Lets move 0x200 (512) bytes in one DMA xfer
;Load the upper two bits of DMABC register
;Actual bytes transferred is (DMABC + 1), so
;we load 0x01FF into DMABC to xfer 0x200 bytes
;The SPI DMA module will now begin transferring
;the data taken from SrcBuf, and will store
;received bytes into DestBuf.
;CPU is now free to do whatever it wants to
;and the DMA operation will continue without
;intervention, until it completes.
;When the transfer is complete, the SSP2IF flag in
;the PIR3 register will become set, and the DMAEN bit
;is automatically cleared by the hardware.
;The DestBuf (0x500-0x7FF) will contain the received
;data.
;to reinitialize RXADDR, TXADDR, DMABC and then
;set the DMAEN bit.
Preliminary
To start another transfer, firmware will need
PIC18F47J53 FAMILY
DS39964B-page 309