PIC18LF27J53-I/ML Microchip Technology, PIC18LF27J53-I/ML Datasheet - Page 381

• Manufacturer Part Number: PIC18LF27J53-I/ML
• Description: IC PIC MCU 128KB FLASH 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF27J53-I/ML

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 2.75 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Digital Ic Case Style: QFN
• Supply Voltage Range: 1.8V To 3.6V
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 23-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
—
2:
Make sure the USB clock source is correctly configured before setting this bit.
There should be at least four cycles of delay between the setting and PPBRST.
Unimplemented: Read as ‘0’
PPBRST: Ping-Pong Buffers Reset bit
1 = Reset all Ping-Pong Buffer Pointers to the Even Buffer Descriptor (BD) banks
0 = Ping-Pong Buffer Pointers are not being reset
SE0: Live Single-Ended Zero Flag bit
1 = Single-ended zero is active on the USB bus
0 = No single-ended zero is detected
PKTDIS: Packet Transfer Disable bit
1 = SIE token and packet processing are disabled, automatically set when a SETUP token is received
0 = SIE token and packet processing are enabled
USBEN: USB Module Enable bit
1 = USB module and supporting circuitry are enabled (device attached)
0 = USB module and supporting circuitry are disabled (device detached)
RESUME: Resume Signaling Enable bit
1 = Resume signaling is activated
0 = Resume signaling is disabled
SUSPND: Suspend USB bit
1 = USB module and supporting circuitry are in Power Conserve mode, SIE clock inactive
0 = USB module and supporting circuitry are in normal operation, SIE clocked at the configured rate
Unimplemented: Read as ‘0’
PPBRST
R/W-0
UCON: USB CONTROL REGISTER (ACCESS F65h)
(2)
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
SE0
R-x
PKTDIS
R/C-0
(1)
Preliminary
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
USBEN
PIC18F47J53 FAMILY
R/W-0
(1)
RESUME
R/W-0
x = Bit is unknown
SUSPND
R/W-0
DS39964B-page 381
U-0
—
bit 0