DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 102
![IC SH7201 MPU ROMLESS 176LQFP](/photos/28/61/286154/176-lqfp_sml.jpg)
DS72011RB120FPV
Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet
1.R0K572011S000BE.pdf
(1222 pages)
Specifications of DS72011RB120FPV
Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 102 of 1222
- Download datasheet (8Mb)
Section 4 Clock Pulse Generator (CPG)
Figure 4.1 shows a block diagram of the clock pulse generator.
Page 74 of 1190
[Legend]
FRQCR:
STBCR:
STBCR2:
STBCR3:
STBCR4:
STBCR5:
MD_CLK1
MD_CLK0
EXTAL
XTAL
CKIO
Frequency control register
Standby control register
Standby control register 2
Standby control register 3
Standby control register 4
Standby control register 5
oscillator
Crystal
Figure 4.1 Block Diagram of Clock Pulse Generator
Clock frequency
control circuit
FRQCR
( 1, 2, 3, 4, 6, 8)
On-chip oscillator
PLL circuit 1
PLL circuit 2
( 2, 4)
CPG control unit
STBCR
Peripheral bus
Divider
Bus interface
1
1/2
1/3
1/4
1/6
1/8
1/12
STBCR2
Standby control circuit
STBCR3
CPU clock
(I , Max. :
120 MHz (Regular specifications),
100 MHz (Wide-range specifications))
Bus clock
(B = CKIO, Max. 60 MHz)
Peripheral clock
(P , Max. 40 MHz)
R01UH0026EJ0300 Rev. 3.00
STBCR4
SH7201 Group
STBCR5
Sep 24, 2010
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