DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 622
![IC SH7201 MPU ROMLESS 176LQFP](/photos/28/61/286154/176-lqfp_sml.jpg)
DS72011RB120FPV
Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet
1.R0K572011S000BE.pdf
(1222 pages)
Specifications of DS72011RB120FPV
Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
(26) Operation when Error Occurs during Reset-Synchronized PWM Mode Operation, and
Figure 12.152 shows an explanatory diagram of the case where an error occurs in reset-
synchronized PWM mode and operation is restarted in normal mode after re-setting.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The count operation is stopped by TSTR. (MTU2 output becomes the reset-synchronized
11. Set normal mode. (MTU2 positive phase output is low, and negative phase output is high.)
12. Initialize the pins with TIOR.
13. Set MTU2 output with the PFC.
14. Operation is restarted by TSTR.
Page 594 of 1190
After a power-on reset, MTU2 output is low and ports are in the high-impedance state.
Select the reset-synchronized PWM output level and cyclic output enabling/disabling with
TOCR.
Set reset-synchronized PWM.
Enable channel 3 and 4 output with TOER.
Set MTU2 output with the PFC.
The count operation is started by TSTR.
The reset-synchronized PWM waveform is output on compare-match occurrence.
An error occurs.
Set port output with the PFC and output the inverse of the active level.
PWM output initial value.)
MTU2
module output
TIOC3A
TIOC3B
TIOC3D
Port output
PB16
PB17
PB19
Operation is Restarted in Normal Mode
Figure 12.152 Error Occurrence in Reset-Synchronized PWM Mode,
Power-on
reset
1
TOCR
2
(RPWM)
TMDR
Hi-Z
Hi-Z
Hi-Z
3
TOER
(1)
4
Recovery in Normal Mode
(MTU2)
PFC
5
TSTR
(1)
6
Match
7
occurs
Error
8
(PORT)
PFC
9
TSTR
(0)
10
(normal)
TMDR
11
R01UH0026EJ0300 Rev. 3.00
0 out)
TIOR
(1 init
12
(MTU2)
PFC
13
SH7201 Group
TSTR
Sep 24, 2010
14
(1)
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