DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 470

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
12.3.22 Timer Gate Control Register (TGCR)
TGCR is an 8-bit readable/writable register that controls the waveform output necessary for
brushless DC motor control in reset-synchronized PWM mode/complementary PWM mode. These
register settings are ineffective for anything other than complementary PWM mode/reset-
synchronized PWM mode.
Page 442 of 1190
Bit
7
6
Bit Name
—
BDC
Figure 12.3 PWM Output Level Setting Procedure in Buffer Operation
Set bit TOCS
Set TOCR2
Set TOLBR
Initial value:
Initial
value
1
0
R/W:
Bit:
[1]
[2]
[3]
—
R/W
R
R/W
R
7
1
BDC
R/W
6
0
[1] Set bit TOCS in TOCR1 to 1 to enable the TOCR2 setting.
[2] Use bits BF1 and BF0 in TOCR2 to select the TOLBR buffer
[3] The TOLBR initial setting must be the same value as specified in
Description
Reserved
This bit is always read as 1. The write value should
always be 1.
This bit selects whether to make the functions of this
register (TGCR) effective or ineffective.
0: Ordinary output
1: Functions of this register are made effective
Brushless DC Motor
transfer timing. Use bits OLS3N to OLS1N and OLS3P to OLS1P
to specify the PWM output levels.
bits OLS3N to OLS1N and OLS3P to OLS1P in TOCR2.
R/W
N
5
0
R/W
P
4
0
R/W
FB
3
0
R/W
WF
2
0
R/W
VF
1
0
R/W
UF
0
0
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010