DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 463

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
Note:
12.3.19 Timer Output Control Register 1 (TOCR1)
TOCR1 is an 8-bit readable/writable register that enables/disables PWM synchronized toggle
output in complementary PWM mode/reset synchronized PWM mode, and controls output level
inversion of PWM output.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
0
Bit
7
6
5, 4
Note: 1. This bit can be set to 1 only once after a power-on reset. After 1 is written, 0 cannot be written to the bit.
* The inactive level is determined by the settings in timer output control registers 1 and 2
Bit Name
OE3B
Bit Name
—
PSYE
—
(TOCR1 and TOCR2). For details, refer to section 12.3.19, Timer Output Control
Register 1 (TOCR1), and section 12.3.20, Timer Output Control Register 2 (TOCR2).
Set these bits to 1 to enable MTU2 output in other than complementary PWM or reset-
synchronized PWM mode. If these bits are set to 0, low level is output.
Initial value:
Initial
Value
0
Initial
value
0
0
All 0
R/W:
Bit:
—
R
7
0
R/W
R/W
R/W
R
R/W
R
PSYE
R/W
6
0
Description
Master Enable TIOC3B
This bit enables/disables the TIOC3B pin MTU2 output.
0: MTU2 output is disabled (inactive level)*
1: MTU2 output is enabled
—
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
PWM Synchronous Output Enable
This bit selects the enable/disable of toggle output
synchronized with the PWM period.
0: Toggle output is disabled
1: Toggle output is enabled
Reserved
These bits are always read as 0. The write value should
always be 0.
R
5
0
—
R
4
0
R/(W)*
TOCL TOCS OLSN OLSP
3
0
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
1
R/W
2
0
R/W
1
0
R/W
0
0
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