DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 497

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
(3)
I2AE bit in TICCR has been set to 1 to include the TIOC2A pin in the TGRA_1 input capture
conditions. In this example, the IOA0 to IOA3 bits in TIOR_1 have selected the TIOC1A rising
edge for the input capture timing while the IOA0 to IOA3 bits in TIOR_2 have selected the
TIOC2A rising edge for the input capture timing.
Under these conditions, the rising edge of both TIOC1A and TIOC2A is used for the TGRA_1
input capture condition. For the TGRA_2 input capture condition, the TIOC2A rising edge is used.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Figure 12.22 illustrates the operation when TCNT_1 and TCNT_2 have been cascaded and the
TGRA_1
TGRA_2
TCNT_1
TIOC1A
TIOC2A
H'FFFF
H'C256
H'6128
H'0000
Cascaded Operation Example (b)
TCNT_2 value
Figure 12.22 Cascaded Operation Example (b)
H'0512
As I1AE in TICCR is 0, data is not captured in TGRA_2 at the TIOC1A input timing.
H'0512
H'0513
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
H'0514
H'C256
H'0513
Time
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