DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 248

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 9 Bus State Controller (BSC)
9.4.7
SDRFCNT0 controls self-refresh operation.
Page 220 of 1190
Bit
31 to 1
0
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
SDRAM Refresh Control Register 0 (SDRFCNT0)
Bit Name
⎯
DSFEN
—
—
31
15
R
R
0
0
—
—
30
14
R
R
0
0
—
—
29
13
R
R
0
0
Initial
Value
All 0
0
—
—
28
12
R
R
0
0
—
—
27
11
R
R
0
0
R/W
R
R/W
—
—
26
10
R
R
0
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
SDRAM Common Self-Refresh Operation Enable
This bit controls self-refresh operation for all channels
simultaneously. Setting DSFEN to 1 performs auto-
refresh cycle operation, immediately after which self-
refresh operation begins. Clearing DSFEN to 0 ends
self-refresh operation, and auto-refresh operation
resumes immediately afterward. The value written to
this bit is reflected when self-refresh operation starts, if
DSFEN was set to 1, or when auto-refresh operation
starts following the end of self-refresh operation, if
DSFEN was cleared to 0.
0: Self-refresh disabled
1: Self-refresh enabled
—
—
25
R
R
0
9
0
24
—
—
R
R
0
8
0
23
—
—
R
R
0
7
0
22
—
—
R
R
0
6
0
21
—
—
R
R
0
5
0
20
—
—
R
R
0
4
0
R01UH0026EJ0300 Rev. 3.00
19
—
—
R
R
0
3
0
18
—
—
R
R
0
2
0
SH7201 Group
17
—
—
Sep 24, 2010
R
R
0
1
0
DSFEN
R/W
16
—
R
0
0
0