DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 1187
![IC SH7201 MPU ROMLESS 176LQFP](/photos/28/61/286154/176-lqfp_sml.jpg)
DS72011RB120FPV
Manufacturer Part Number
DS72011RB120FPV
Description
IC SH7201 MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheet
1.R0K572011S000BE.pdf
(1222 pages)
Specifications of DS72011RB120FPV
Core Size
32-Bit
Core Processor
SH-2A
Speed
120MHz
Connectivity
CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
176-LQFP
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
120MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-20°C To +70°C
Embedded Interface Type
I2C, SSI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS72011RB120FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 1187 of 1222
- Download datasheet (8Mb)
SH7201 Group
[Legend]
I:
O:
H:
L:
Z:
K:
Notes: 1. When pins for the connection with a crystal resonator are not used, the EXTAL and
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
I/O ports
Type
Input
Output
High-level output
Low-level output
High-impedance
Input pins become high-impedance, and output pins retain their state.
2. Power-on reset by low-level input to the RES pin. The pin states after a power-on reset
3. IRQ pins that can release deep standby mode are limited to PE7 to PE4 and PC25 to
4. Z when the TAP controller of the H-UDI is neither the Shift-DR nor Shift-IR state.
5. L when the CKIO output is specified and Z when the CKIO output is stopped with the
Pin Function
PC25 to PC22
PC21 to PC13
PC12, PC11
PC10
PC9
PC8
PC7 to PC1
PC0
PD16, PD15
PD14 to PD0
PE7 to PE0
PF7 to PF0
AUDIO_X1 pins must be pulled up and the XTAL and AUDIO_X2 pins must be open.
The RTC_X1 pin must be connected to GND and the RTC_X2 must be open.
by the H-UDI reset assert command or WDT overflow are the same as the initial pin
states at normal operation (see section 23, Pin Function Controller (PFC)).
PC22.
setting of CKIOCR.
Pin Name
I
I
I
I
H
H
I
H
I
I
I
I
8 Bits
Area 0 Data Bus Width
Power-On*
I
I
I
H
H
H
I
H
I
I
I
I
16 Bits
Reset State
2
I
I
H
H
H
H
I
H
I
I
I
I
32 Bits Manual
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
I
I/O
Pin State
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
I
I/O
Sleep
Power-Down State
Z
K
K
K
K
K
K
K
Z
K
Z
K
Software
Standby
Page 1159 of 1190
Z
K
K
K
K
K
K
K
Z
K
Z
K
Standby
Deep
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