EZ80F91NA050SC Zilog, EZ80F91NA050SC Datasheet - Page 202

• Manufacturer Part Number: EZ80F91NA050SC
• Description: IC ACCLAIM MCU 256KB 144-BGA
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F91NA050SC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144-LBGA
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 50 MHz
• Data Ram Size: 16 KB
• Number Of Programmable I/os: 32
• Number Of Timers: 16 Bit
• Operating Supply Voltage: 3 V to 3.6 V
• Mounting Style: SMD/SMT
• Height: 1.5 mm
• Length: 13 mm
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Width: 13 mm
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: No RoHS Version Available
• Other names: 269-3251

Table 107. UART Modem Status Registers
PS019215-0910
Bit 
Position
0
DR
Bit
Reset
CPU Access
Note: R = Read only.
Bit 
Position
7
DCD
6
RI
5
DSR
4
CTS
UART Modem Status Register
This register is used to show the status of the UART signals. See
Value
0
1
Value
0–1
0–1
0–1
0–1
Description
This bit is reset to 0 when the UARTx_RBR register is read or
all bytes are read from the receiver FIFO.
Data ready. If the FIFO is not enabled, this bit is set to 1 when
a complete incoming character is transferred into the receiver
buffer register from the receiver shift register. If the FIFO is
enabled, this bit is set to 1 when a character is received and
transferred to the receiver FIFO.
Description
Data Carrier Detect
In NORMAL mode, this bit reflects the inverted state of the
DCDx input pin. In LOOP BACK mode, this bit reflects the
value of the UARTx_MCTL[3] = out2.
Ring Indicator
In NORMAL mode, this bit reflects the inverted state of the RIx
input pin. In LOOP BACK mode, this bit reflects the value of the
UARTx_MCTL[2] = out1.
Data Set Ready
In NORMAL mode, this bit reflects the inverted state of the
DSRx input pin. In LOOP BACK mode, this bit reflects the
value of the UARTx_MCTL[0] = DTR.
Clear to Send
In NORMAL mode, this bit reflects the inverted state of the
CTSx input pin. In LOOP BACK mode, this bit reflects the value
of the UARTx_MCTL[1] = RTS.
X
R
7
X
R
6
X
R
5
(UART0_MSR = 00C6h, UART1_MSR = 00 D6h)
X
R
4
R
X
3
Universal Asynchronous Receiver/Transmitter
R
X
2
R
X
1
Product Specification
Table
R
X
0
107.
eZ80F91 MCU
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