EZ80F91NA050SC Zilog, EZ80F91NA050SC Datasheet - Page 34

• Manufacturer Part Number: EZ80F91NA050SC
• Description: IC ACCLAIM MCU 256KB 144-BGA
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F91NA050SC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144-LBGA
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 50 MHz
• Data Ram Size: 16 KB
• Number Of Programmable I/os: 32
• Number Of Timers: 16 Bit
• Operating Supply Voltage: 3 V to 3.6 V
• Mounting Style: SMD/SMT
• Height: 1.5 mm
• Length: 13 mm
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Width: 13 mm
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: No RoHS Version Available
• Other names: 269-3251

PS019215-0910
Table 2. Pin Identification on the eZ80F91 Device (Continued)
LQFP
Pin No
143
144
System Clock Source Options
BGA
Pin No Symbol
B3
A2
The following section describes the system clock source options.
System Clock—
all internal logic. The SCLK source can be an external crystal oscillator, an internal PLL,
or an internal 32 kHz RTC oscillator. The SCLK source is selected by PLL Control Regis-
ter 0. RESET default is provided by the external crystal oscillator. For more details on
CLK_MUX values in the PLL Control Register 0, see
PHI—
the eZ80F91 device. PHI is used as the reference clock for all AC characteristics, see
page 344.
External Crystal Oscillator—
one mode, the X
is not connected. In the other mode, the X
Crystals recommended by Zilog
335.
Real Time Clock—
the on-chip 32768 Hz crystal oscillator or a 50/60 Hz power-line frequency input. While
intended for timekeeping, the RTC 32 kHz oscillator is selected as an SCLK. RTC_V
and RTC_V
loss of line power when a battery is provided. For more details, see
page 335.
MHz range fundamental for PLL operation. For details, see
MDIO
WP
PHI is a device output driven by SCLK that is used for system synchronization to
SS
provides an isolated power supply to ensure RTC operation in the event of
Function
MII
Management
Data
Write Protect
IN
The eZ80F91 device’s internal clock, SCLK, is responsible for clocking
pin is driven by a oscillator from DC up to 50 MHz when the X
An internal 32 kHz real-time clock crystal oscillator driven by either
An externally-driven oscillator operates in two modes. In
Signal Direction Description
Bidirectional
Schmitt-trigger
input, Active Low
®
are defined to be a 50 MHz–3 overtone circuit or 1–10
IN
and X
OUT
This pin is used by the Ethernet MAC
for the MII Management Interface to
the PHY. The Ethernet MAC sends
and receives the MII Management
Data to and from the MII PHY
interface.
The Write Protect input is used by the
Flash Controller to protect the Boot
Block from Write and ERASE
operations.
Table 154
pins are driven by a crystal circuit.
On-Chip Oscillators
Product Specification
on page 269.
On-Chip Oscillators
Architectural Overview
on page
OUT
DD
pin
on
25