EZ80F91NA050SC Zilog, EZ80F91NA050SC Datasheet - Page 320

• Manufacturer Part Number: EZ80F91NA050SC
• Description: IC ACCLAIM MCU 256KB 144-BGA
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F91NA050SC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144-LBGA
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 50 MHz
• Data Ram Size: 16 KB
• Number Of Programmable I/os: 32
• Number Of Timers: 16 Bit
• Operating Supply Voltage: 3 V to 3.6 V
• Mounting Style: SMD/SMT
• Height: 1.5 mm
• Length: 13 mm
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Width: 13 mm
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: No RoHS Version Available
• Other names: 269-3251

Table 196. EMAC Address Filter Register (EMAC_AFR = 0032h)
PS019215-0910
Bit
Reset
CPU Access
Note: R = Read Only; R/W = Read/Write.
Bit 
Position
[7:4]
3
PROM
2
MC
1
QMC
0
BC
EMAC Address Filter Register
The EMAC Address Filter Register functions as a filter to control Promiscuous mode, and
multicast and broadcast messaging. See
Value
0h
1
0
1
0
1
0
1
0
Description
Reserved.
Enable Promiscuous Mode. Receive all incoming packets
regardless of station address. Disables station address
filtering.
Disable Promiscuous Mode.
Accept any multicast message. A multicast packet is
determined by the first bit in the destination address. If the first
LSB is a 1, it is a group address and is globally or locally
administered depending on the 2nd bit. For more information,
see IEEE 802.3/3.2.3.
Do not accept multicast messages of any type.
Accept only qualified multicast (QMC) messages as
determined by the hash table.
Do not accept QMC messages.
Accept broadcast messages. Broadcast messages have the
destination address set to FFFFFFFFFFFFh.
Do not accept broadcast messages.
R
7
0
R
6
0
R
5
0
R
4
0
Table
R/W
3
0
196.
R/W
2
0
R/W
Ethernet Media Access Controller
1
0
Product Specification
R/W
0
0
311