EZ80F91NA050SC Zilog, EZ80F91NA050SC Datasheet - Page 99
EZ80F91NA050SC
Manufacturer Part Number
EZ80F91NA050SC
Description
IC ACCLAIM MCU 256KB 144-BGA
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F91NA050SC
Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
144-LBGA
Data Bus Width
8 bit
Maximum Clock Frequency
50 MHz
Data Ram Size
16 KB
Number Of Programmable I/os
32
Number Of Timers
16 Bit
Operating Supply Voltage
3 V to 3.6 V
Mounting Style
SMD/SMT
Height
1.5 mm
Length
13 mm
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Width
13 mm
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No RoHS Version Available
Other names
269-3251
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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PS019215-0910
Table 31. eZ80F91 Pin Status During Bus Acknowledge Cycles
Normal bus operation of the eZ80F91 device using CS0 to communicate to an external
peripheral is displayed in
bus master communicating with an external peripheral during bus acknowledge cycles.
Pin Symbol
ADDR23..ADDR0
CS0
CS1
CS2
CS3
DATA7..0
IORQ
MREQ
RD
WR
INSTRD
Signal Direction
Input
Output
Output
Output
Output
Tristate
Input
Input
Tristate
Tristate
Tristate
Figure 20
on page 91.
Description
Allows external bus master to utilize the chip
select logic of the eZ80F91.
Normal operation.
Normal operation.
Normal operation.
Normal operation.
Allows external bus master to communicate
with external peripherals.
Allows external bus master to utilize the chip
select logic of the eZ80F91.
Allows external bus master to utilize the chip
select logic of the eZ80F91.
Allows external bus master to communicate
with external peripherals.
Allows external bus master to communicate
with external peripherals.
Allows external bus master to communicate
with external peripherals.
Figure 21
on page 91 displays an external
Chip Selects and Wait States
Product Specification
eZ80F91 MCU
90
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