EZ80F91NA050SC Zilog, EZ80F91NA050SC Datasheet - Page 48

• Manufacturer Part Number: EZ80F91NA050SC
• Description: IC ACCLAIM MCU 256KB 144-BGA
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F91NA050SC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144-LBGA
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 50 MHz
• Data Ram Size: 16 KB
• Number Of Programmable I/os: 32
• Number Of Timers: 16 Bit
• Operating Supply Voltage: 3 V to 3.6 V
• Mounting Style: SMD/SMT
• Height: 1.5 mm
• Length: 13 mm
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Width: 13 mm
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: No RoHS Version Available
• Other names: 269-3251

eZ80
PS019215-0910
Features
New Instructions
®
CPU Core
The eZ80
module or task under a real-time executive or operating system operates in Z80
compatible (64 KB) mode or full 24-bit (16 MB) address mode.
The CPU instruction set is a superset of the instruction sets for the Z80 and Z180 CPUs.
Z80 and Z180 programs are executed on an eZ80 CPU with little or no modification.
The features of eZ80 CPU include:
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The new instructions are listed below:
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For more information on the CPU, its instruction set, and eZ80 programming, refer to
eZ80 CPU User Manual (UM0077), available on www.zilog.com.
Code-compatible with Z80 and Z180 products
24-bit linear address space
Single-cycle instruction fetch
Pipelined fetch, decode, and execute
Dual Stack Pointers for ADL (24-bit) and Z80 (16-bit) memory modes
24-bit CPU registers and Arithmetic Logic Unit (ALU)
Debug support
Nonmaskable Interrupt (NMI), plus support for 128 maskable vectored interrupts
Loads/unloads the I register with a 16-bit value. These new instructions are:
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LD I,HL (ED C7)
LD HL,I (ED D7)
®
CPU is the first 8-bit CPU to support 16 MB linear addressing. Each software
Product Specification
eZ80
®
®
CPU Core
39