PIC18F45K80-I/PT Microchip Technology, PIC18F45K80-I/PT Datasheet - Page 412

• Manufacturer Part Number: PIC18F45K80-I/PT
• Description: MCU PIC 32KB FLASH 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45K80-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F45K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F66K80 FAMILY
REGISTER 27-14: RXB1CON: RECEIVE BUFFER 1 CONTROL REGISTER
DS39977C-page 412
Mode 0
Mode 1,2
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-5, 6
bit 5
bit 4
bit 3
Note 1:
This bit is set by the CAN module upon receiving a message and must be cleared by software after the buffer
is read. As long as RXFUL is set, no new message will be loaded and the buffer will be considered full.
bit 7
RXFUL: Receive Full Status bit
1 = Receive buffer contains a received message
0 = Receive buffer is open to receive a new message
Mode 0:
RXM<1:0>: Receive Buffer Mode bit 1 (combines with RXM0 to form RXM<1:0> bits, see bit 5)
11 = Receive all messages (including those with errors); filter criteria is ignored
10 = Receive only valid messages with extended identifier; EXIDEN in RXFnSIDL must be ‘ 1 ’
01 = Receive only valid messages with standard identifier, EXIDEN in RXFnSIDL must be ‘ 0 ’
00 = Receive all valid messages as per EXIDEN bit in RXFnSIDL register
Mode 1, 2:
RXM1: Receive Buffer Mode bit
1 = Receive all messages (including those with errors); acceptance filters are ignored
0 = Receive all valid messages as per acceptance filters
Mode 0:
RXM<1:0>: Receive Buffer Mode bit 0 (combines with RXM1 to form RXM<1:0> bits, see bit 6)
Mode 1, 2:
RTRRO: Remote Transmission Request bit for Received Message (read-only)
1 = A remote transmission request is received
0 = A remote transmission request is not received
Mode 0:
FILHIT2 4: Filter Hit bit 4
Mode 1, 2:
FILHIT<4:0>: Filter Hit bit 4
This bit combines with other bits to form the filter acceptance bits<4:0>.
Mode 0:
RXRTRRO: Remote Transmission Request bit for Received Message (read-only)
1 = A remote transmission request is received
0 = A remote transmission request is not received
Mode 1, 2:
FILHIT<4:0>: Filter Hit bit 3
This bit combines with other bits to form the filter acceptance bits<4:0>.
RXFUL
RXFUL
R/C-0
R/C-0
(1)
(1)
R/W-0
R/W-0
RXM1
RXM1
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
RTRRO
R/W-0
RXM0
(1)
R-0
Preliminary
FILHIT4
U-0
R-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RXRTRRO
FILHIT3
R-0
R-0
FILHIT2
FILHIT2
R/W-0
R-0
 2011 Microchip Technology Inc.
x = Bit is unknown
FILHIT1
FILHIT1
R-0
R-0
FILHIT0
FILHIT0
R-0
R-0
bit 0