IPR-PCI/MT32 Altera, IPR-PCI/MT32 Datasheet - Page 5

• Manufacturer Part Number: IPR-PCI/MT32
• Description: IP CORE Renewal Of IP-PCI/MT32
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCI/MT32

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Compiler, Master/Target, 32 bit
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

About PCI Compiler
Section I. PCI Compiler With MegaWizard Plug-In Manager Flow
Chapter 1. Getting Started
Altera Corporation
Introduction ................................................................................................................................................ 1
Release Information ................................................................................................................................... 2
Device Family Support ............................................................................................................................. 2
Features ....................................................................................................................................................... 3
General Description ................................................................................................................................... 5
Selecting the Appropriate Flow for Your Design ................................................................................. 9
Compliance Summary ............................................................................................................................ 10
Performance and Resource Utilization ................................................................................................. 11
Installation and Licensing ...................................................................................................................... 17
Design Flow ............................................................................................................................................ 1–1
PCI MegaCore Function Design Walkthrough ................................................................................. 1–2
Simulate the Design ............................................................................................................................... 1–9
The Quartus II Simulation Files ......................................................................................................... 1–12
Common Features ..................................................................................................................................3
PCI Compiler with MegaWizard Plug-in Manager Flow ................................................................4
PCI Compiler with SOPC Builder Flow..............................................................................................4
PCI MegaCore Functions ......................................................................................................................5
PCI Testbench .........................................................................................................................................6
PCI Compiler with MegaWizard Plug-in Manager Flow ................................................................6
PCI Compiler With SOPC Builder Flow .............................................................................................7
PCI Compiler With SOPC Builder Flow .............................................................................................9
PCI Compiler With MegaWizard Plug-in Manager Flow..............................................................10
PCI Compiler with MegaWizard Plug-in Manager Flow ..............................................................11
PCI Compiler with SOPC Builder Flow............................................................................................13
OpenCore Plus Evaluation..................................................................................................................19
OpenCore Plus Time-Out Behavior...................................................................................................19
Create a New Quartus II Project .................................................................................................... 1–2
Launch IP Toolbench ....................................................................................................................... 1–4
Step 1: Parameterize ......................................................................................................................... 1–5
Step 2: Set Up Simulation ................................................................................................................ 1–7
Step 3: Generate ................................................................................................................................ 1–7
Simulation in the Quartus II Software ........................................................................................ 1–11
Master Simulation Files ................................................................................................................. 1–13
Target Simulation Files .................................................................................................................. 1–15
Contents
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