IPR-PCI/MT32 Altera, IPR-PCI/MT32 Datasheet - Page 50

• Manufacturer Part Number: IPR-PCI/MT32
• Description: IP CORE Renewal Of IP-PCI/MT32
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCI/MT32

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Compiler, Master/Target, 32 bit
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Compile the Design
Compile the
Design
1–16
PCI Compiler User Guide
tmbr
tmsr
tmbr_abrt
tmbr_disc_wd
tmbr_disc_wod
tmbr_ret
cfg_wr_rd
tior
exp_rom_tmbr
tmbw
tmsw
tmbw_abrt
tmbw_disc_wd
tmbw_disc_wod
tmbw_ret
tiow
exp_rom_tmbw
Table 1–5. pci_mt32 & pci_t32 Target Directory
Simulation File
Name
f
Memory Burst Read
Memory Single-Cycle
Memory Abort
Memory Disconnect with Data
Memory Disconnect without Data
Memory Retry
Configuration Write and Read
I/O Read
Expansion ROM Memory Burst Read
Memory Burst Write
Memory Single-Cycle
Memory Abort
Memory Disconnect with Data
Memory Disconnect without Data
Memory Retry
I/O Write
Expansion ROM Memory Burst Write
Table 1–5
<path>\pci_compiler\megawizard_flow\qexamples\
<pci_mt32 or pci_t32>\sim\target directory.
You can use the Quartus II software to compile your design.
Altera provides constraint files to ensure that the PCI MegaCore function
achieves PCI specification timing requirements in Altera devices. This
walkthrough incorporates a constraint file included with PCI Compiler.
For more information on using Altera-provided constraint files in your
design, refer to
For instructions on compiling your design, refer to Quartus II Help.
describes the Quartus II simulation files included in the
PCI Compiler Version 10.1
Appendix A, Using PCI Constraint File Tcl
Target Write
Target Read
Description
Altera Corporation
Scripts.
January 2011