IPR-PCI/MT32 Altera, IPR-PCI/MT32 Datasheet - Page 9
IPR-PCI/MT32
Manufacturer Part Number
IPR-PCI/MT32
Description
IP CORE Renewal Of IP-PCI/MT32
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-PCI/MT32
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Arria II GX, Cyclone, Stratix
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Compiler, Master/Target, 32 bit
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
- Current page: 9 of 358
- Download datasheet (3Mb)
Contents
Chapter 7. Functional Description
Altera Corporation
System Options-2 ................................................................................................................................... 6–9
PCI Configuration ............................................................................................................................... 6–11
Avalon Configuration ......................................................................................................................... 6–16
Functional Overview ............................................................................................................................. 7–1
Interface Signals ................................................................................................................................... 7–13
PCI Bus Commands ............................................................................................................................ 7–15
PCI Target Operation .......................................................................................................................... 7–15
PCI Master Operation ......................................................................................................................... 7–27
PCI-Avalon Bridge Blocks ............................................................................................................... 7–2
PCI Operational Modes ................................................................................................................... 7–6
Performance Profiles ...................................................................................................................... 7–11
PCI Bus Arbiter Signals ................................................................................................................. 7–14
Non-Prefetchable Operations ....................................................................................................... 7–17
Prefetchable Operations ................................................................................................................ 7–21
PCI-to-Avalon Address Translation ............................................................................................ 7–26
Avalon-To-PCI Read & Write Operation .................................................................................... 7–28
Avalon-to-PCI Address Translation ............................................................................................ 7–35
Ordering of Requests ..................................................................................................................... 7–38
PCI Bus Speed .............................................................................................................................. 6–9
PCI Data Bus Width .................................................................................................................... 6–9
PCI Clock/Reset Settings ........................................................................................................... 6–9
PCI Bus Arbiter ......................................................................................................................... 6–10
PCI Base Address Registers ..................................................................................................... 6–11
PCI Read-Only Registers ......................................................................................................... 6–11
Setting the PCI Base Address Register Values ..................................................................... 6–11
Manual Setting of the BAR Size & Avalon Base Address ................................................... 6–14
Avalon-MM Ports ....................................................................................................................... 7–3
Control/Status Register Module .............................................................................................. 7–5
PCI MegaCore Function ............................................................................................................. 7–5
PCI Bus Arbiter ........................................................................................................................... 7–6
Other PCI-Avalon Bridge Modules .......................................................................................... 7–6
PCI Target-Only Peripheral Mode Operation ........................................................................ 7–6
PCI Master/Target Peripheral Mode Operation .................................................................... 7–8
PCI Host-Bridge Device Mode Operation ............................................................................. 7–10
Target Performance .................................................................................................................. 7–12
Master Performance .................................................................................................................. 7–12
Non-Prefetchable Write Operations ....................................................................................... 7–18
I/O Write Operations ............................................................................................................... 7–19
Non-Prefetchable Read Operations ........................................................................................ 7–19
Prefetchable Write Operations ................................................................................................ 7–22
Prefetchable Read Operations ................................................................................................. 7–23
Avalon-to-PCI Write Requests ................................................................................................ 7–31
Avalon-to-PCI Read Requests ................................................................................................. 7–32
Arbitration Among Pending PCI Master Requests .............................................................. 7–34
Ordering of Avalon-to-PCI Operations ................................................................................. 7–39
PCI Compiler Version 10.1
PCI Compiler User Guide
ix
Related parts for IPR-PCI/MT32
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
IP CORE Renewal Of IP-PCI/MT64
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCI/T32
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCI/T64
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCIE/1
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCIE/4
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCIE/8
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet: