PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 142
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PEB2256H-V12
Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2256H-V12.pdf
(490 pages)
Specifications of PEB2256H-V12
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN
PEB2256H-V12IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
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Figure 49 gives an overview of influences on synchronization status for the case of
different external actions. Activation of auto mode and non-auto mode is performed by
bit FMR4.AUTO. Generally, for initiating resynchronization it is recommended to use bit:
FMR0.EXLS first. In cases where the synchronizer remains in the asynchronous state,
bit FMR0.FRS is used to enforce it to lock onto the next framing candidate, although it
might be a simulated one.
5.2.4
The allocation of the FT-bits (bit 1 of frames 1 and 3) for frame alignment signal is shown
in
The FS-bit can be used for signaling. Remote alarm (yellow alarm) is indicated by setting
bit 2 to 0 in each time slot.
Table 33
Frame Number
1
2
3
4
5.2.4.1
For multiframe synchronization, the terminal framing bits (FT-bits) are observed. The
synchronous state is reached if at least one terminal framing candidate is definitely
found, or the synchronizer is forced to lock onto the next available candidate
(FMR0.FRS).
Data Sheet
Table
33.
4-Frame Multiframe (F4 Format, T1/J1)
Synchronization Procedure
4-Frame Multiframe Structure (T1/J1)
F
1
–
0
–
T
142
Functional Description T1/J1
F
service bit
service bit
S
FALC56 V1.2
PEB 2256
2002-08-27
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