PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 423

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PEB2256H-V12

Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2256H-V12

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
Receive DL-Bit Register 3 (Read)
RDL3
RDL3(7:0)
Receive Signaling Pointer 1 (Read)
Value after reset: 00
RSP1
RS(8:1)C
Receive Signaling Pointer 2 (Read)
Value after reset: 00
RSP2
RS(12:0)C
Data Sheet
RDL37
RS8C
7
7
7
Receive DL-Bit
Only valid if F72 format is enabled.
The received DL-Bits are shifted into this register. RDL30 is received
in frame 58 and RDL37 in frame 72, if F72 format is enabled.
This register is updated with every receive multiframe begin interrupt
ISR0.RMB.
Receive Signaling Register RS(8:1) Changed
A one in each bit position indicates that the received signaling data in
the corresponding RS(8:1) registers are updated. Bit RS1C is the
pointer for register RS1, while RS8C points to RS8.
Receive Signaling Register RS(12:9) Changed
A one in each bit position indicates that the received signaling data in
the corresponding RS(12:9) registers are updated. Bit RS9C is the
pointer for register RS9, while RS12C points to RS12
RDL36
RS7C
H
H
RDL35
RS6C
RDL34
RS5C
423
RS12C
RDL33
RS4C
RS11C
RDL32
RS3C
RS10C
RDL31
RS2C
T1/J1 Registers
RDL30
RS1C
RS9C
FALC56 V1.2
0
0
0
PEB 2256
2002-08-27
(5E)
(62)
(63)

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