PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 312
![no-image](/images/manufacturer_photos/0/3/327/infineon_technologies_sml.jpg)
PEB2256H-V12
Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2256H-V12.pdf
(490 pages)
Specifications of PEB2256H-V12
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN
PEB2256H-V12IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
- Current page: 312 of 490
- Download datasheet (6Mb)
CRC4
SA6SC
RPF
Interrupt Status Register 1 (Read)
ISR1
All bits are reset when ISR1 is read.
If bit GCR.VIS is set, interrupt statuses in ISR1 are flagged although they are masked by
register IMR1. However, these masked interrupt statuses neither generate a signal on
INT, nor are visible in register GIS.
LLBSC
Data Sheet
LLBSC
7
Receive CRC4 Error
0 =
1 =
Receive S
With every change of state of the received S
interrupt is set.
Receive Pool Full
32 bytes of a frame have arrived in the receive FIFO. The frame is not
yet completely received.
Line Loop-Back Status Change
Depending on bit LCR1.EPRM the source of this interrupt status
changed:
LCR1.EPRM = 0: This bit is set, if the LLB activate signal or the LLB
deactivate signal, respectively, is detected over a period of 25 ms with
a bit error rate less than 10
The LLBSC bit is also set, if the current detection status is left, i.e., if
the bit error rate exceeds 10
The actual detection status can be read from the RSP.LLBAD and
RSP.LLBDD, respectively.
PRBS Status Change
LCR1.EPRM = 1: With any change of state of the PRBS synchronizer
this bit is set. The current status of the PRBS synchronizer is
indicated in RSP.LLBAD.
RDO
No CRC4 error occurs.
The CRC4 check of the last received submultiframe failed.
ALLS
a
6-Bit Status Changed
XDU
312
-2
XMB
-2
.
.
SUEX
XLSC
a
6-bit combinations this
FALC56 V1.2
XPR
E1 Registers
0
PEB 2256
2002-08-27
(69)
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