PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 354

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

Framer Mode Register 5 (Read/Write)
Value after reset: 00
FMR5
EIBR
XLD
XLU
XTM
Data Sheet
7
Enable Internal Bit Robbing Access
0 =
1 =
Transmit Line Loop-Back (LLB) Down Code
0 =
1 =
Transmit LLB Up Code
0 =
1 =
Transmit Transparent Mode
0 =Ports SYPX/XMFS define the frame/multiframe begin on the
1 =
EIBR
H
Normal operation.
A one in this bit position causes the transmitter to send the bit
robbing signaling information stored in the XS(12:1) (ESF, F12,
72) registers or serial CAS in the corresponding time slots.
Normal operation.
A one in this bit position causes the transmitter to replace
normal transmit data with the LLB down (deactivate) Code
continuously until this bit is reset. The LLB down code is
overwritten by the framing/DL/CRC bits optionally.
Normal operation.
A one in this bit position causes the transmitter to replace
normal transmit data with the LLB up (activate) code
continuously until this bit is reset. The LLB up code is optionally
overwritten by the framing/DL/CRC bits. For proper operation
bit FMR5.XLD must be cleared.
transmit
synchronized on this externally sourced frame boundary and
generates the FS/DL-bits according to this framing. Any change
of the transmit time slot assignment subsequently produces a
change of the FS/DL-bit positions.
the transmitter. The transmitter is now in a free running mode
without any possibility to actualize the multiframe position. The
framing (FS/DL-bits) generated by the transmitter are not
“disturbed“ (in case of changing the transmit time slot
assignment) by the transmit system highway unless register
XC1 is written. This bit should be set if loop-timed application is
Disconnects the control of the transmit system interface from
XLD
system
XLU
354
highway.
XTM
The
transmitter
SSC2
T1/J1 Registers
FALC56 V1.2
0
PEB 2256
is
2002-08-27
usually
(21)