PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 244
![no-image](/images/manufacturer_photos/0/3/327/infineon_technologies_sml.jpg)
PEB2256H-V12
Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2256H-V12.pdf
(490 pages)
Specifications of PEB2256H-V12
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN
PEB2256H-V12IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
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Transmit S
Value after reset: 00
XSA4
XSA5
XSA6
XSA7
XSA8
XSA(8:4)
Data Sheet
XS47
XS57
XS67
XS77
XS87
a
7
(8:4) Register (Read/Write)
Transmit S
The S
With the transmit multiframe begin an interrupt ISR1.XMB is
generated and the contents of these registers XSA(8:4) is copied into
a shadow register. The contents is subsequently sent out in the
service words of the next outgoing CRC multiframe (or doubleframes)
if none of the time slot 0 transparent modes is enabled. XS40 is sent
out in bit position 4 in frame 1, XS47 in frame 15. The transmit
multiframe begin interrupt XMB request that these registers should be
serviced. If requests for new information are ignored, current contents
is repeated.
XS46
XS56
XS66
XS76
XS86
H
, 00
a
H
-bit register access is enabled by setting bit FMR1.ENSA = 1.
, 00
XS45
XS55
XS65
XS75
XS85
H
a
-Bit Data
, 00
H
, 00
XS44
XS54
XS64
XS74
XS84
H
244
XS43
XS53
XS63
XS73
XS83
XS42
XS52
XS62
XS72
XS82
XS41
XS51
XS61
XS71
XS81
XS40
XS50
XS60
XS70
XS80
FALC56 V1.2
E1 Registers
0
PEB 2256
2002-08-27
(2C)
(2D)
(2E)
(2F)
(30)
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