PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 232
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PEB2256H-V12
Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2256H-V12.pdf
(490 pages)
Specifications of PEB2256H-V12
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN
PEB2256H-V12IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
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Framer Mode Register 2 (Read/Write)
Value after reset: 00
FMR2
RFS(1:0)
RTM
DAIS
SAIS
PLB
Data Sheet
RFS1
7
Receive Framing Select
00 = Doubleframe format
01 = Doubleframe format
10 = CRC4 Multiframe format
11 = CRC4 Multiframe format with modified CRC4 Multiframe
Receive Transparent Mode
Setting this bit disconnects control of the internal elastic store from the
receiver. The elastic store is now in a “free running” mode without any
possibility to actualize the time slot assignment to a new frame
position in case of resynchronization of the receiver. This function can
be used together with the “disable AIS to system interface” feature
(FMR2.DAIS) to realize undisturbed transparent reception.
This bit should be enabled in case of unframed data reception mode.
Disable AIS to System Interface
0 =
1 =
Send AIS Towards System Interface
Sends AIS on output RDO towards system interface. This function is
not influenced by bit FMR2.DAIS.
Payload Loop-Back
0 =
1 =
RFS0
H
alignment algorithm (Interworking according to ITU-T G.706
Annex B). Setting of FMR3.EXTIW changes the reaction after
the 400 ms time-out.
AIS is automatically inserted into the data stream to RDO if
FALC56 is in asynchronous state.
Automatic AIS insertion is disabled. Furthermore, AIS insertion
can be initiated by programming bit FMR2.SAIS.
Normal operation. Payload loop is disabled.
The payload loop-back loops the data stream from the receiver
section back to transmitter section. Looped data is output on
pin RDO. Data received on port XDI, XSIG, SYPX and XMFS is
ignored. With XSP.TT0 = 1 time slot 0 is also looped back. If
XSP.TT0 = 0 time slot 0 is generated internally. AIS is sent
RTM
DAIS
232
SAIS
PLB
AXRA
ALMF
FALC56 V1.2
E1 Registers
0
PEB 2256
2002-08-27
(1E)
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