PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 307
![no-image](/images/manufacturer_photos/0/3/327/infineon_technologies_sml.jpg)
PEB2256H-V12
Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2256H-V12.pdf
(490 pages)
Specifications of PEB2256H-V12
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN
PEB2256H-V12IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
- Current page: 307 of 490
- Download datasheet (6Mb)
Signaling Status Register (Read)
SIS
XDOV
XFW
XREP
RLI
CEC
SFS
Data Sheet
XDOV
7
Transmit Data Overflow - HDLC Channel 1
More than 32 bytes have been written to the XFIFO.
This bit is reset
– by a transmitter reset command XRES
– when all bytes in the accessible half of the XFIFO have been moved
Transmit FIFO Write Enable - HDLC Channel 1
Data can be written to the XFIFO.
Transmission Repeat - HDLC Channel 1
Status indication of CMDR.XREP.
Receive Line Inactive - HDLC Channel 1
Neither flags as interframe time fill nor frames are received through
the signaling time slot.
Command Executing - HDLC Channel 1
0 =
1 =
Note: CEC is active for about 2.5 periods of the current system data
Status Freeze Signaling
0 =
1 =
XFW
in the inaccessible half.
rate.
Freeze signaling status inactive.
Freeze signaling status active
No command is currently executed, the CMDR register can be
written to.
A command (written previously to CMDR) is currently executed,
no further command can be temporarily written in CMDR
register.
XREP
307
RLI
CEC
SFS
FALC56 V1.2
E1 Registers
0
PEB 2256
2002-08-27
(64)
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