PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 294

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PEB2256H-V12

Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2256H-V12

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
Framer Receive Status Register 1 (Read)
FRS1
EXZD
TS16RA
TS16LOS
TS16AIS
TS16LFA
Data Sheet
EXZD
7
TS16RA TS16LOS TS16AIS TS16LFA
Excessive Zeros Detected
Significant only, if excessive zero detection has been enabled
(FMR0.EXZE = 1). Set after detection of more than 3 (HDB3 code) or
15 (AMI code) contiguous zeros in the received data stream.
This bit is cleared on read.
Receive Time Slot 16 Remote Alarm
This bit contains the actual information of the received remote alarm
bit RS1.2 in time slot 16. Setting and resetting of this bit causes an
interrupt status change ISR3.RA16.
Receive Time Slot 16 Loss-of-Signal
This bit is set if the incoming TS16 data stream contains always zeros
for at least 16 contiguously received time slots. A one in a time slot 16
resets this bit.
Receive Time Slot 16 Alarm Indication Signal
The detection of the alarm indication signal in time slot 16 is according
to ITU-T G.775.
This bit is set if the incoming TS16 contains less than 4 zeros in each
of two consecutive TS16 multiframe periods. This bit is cleared if two
consecutive received CAS multiframe periods contains more than 3
zeros or the multiframe pattern was found in each of them. This bit is
cleared if TS0 synchronization is lost.
Receive Time Slot 16 Loss of Multiframe Alignment
0 =
1 =
The CAS controller is in synchronous state after frame
alignment is accomplished.
This bit is set if the framing pattern "0000" in 2 consecutive CAS
multiframes were not found or in all TS16 of the preceding
multiframe all bits were reset. An interrupt ISR3.LMFA16 is
generated.
294
XLS
FALC56 V1.2
XLO
E1 Registers
0
PEB 2256
2002-08-27
(4D)

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