PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 245
![no-image](/images/manufacturer_photos/0/3/327/infineon_technologies_sml.jpg)
PEB2256H-V12
Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2256H-V12.pdf
(490 pages)
Specifications of PEB2256H-V12
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN
PEB2256H-V12IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
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Framer Mode Register 3 (Read/Write)
Value after reset: 00
FMR3
XLD
XLU
CMI
SA6SY
Data Sheet
7
Transmit LLB Down Code
0 =
1 =
Transmit LLB UP Code
0 =
1 =
Select CMI Precoding
Only valid if CMI code (FMR0.XC(1:0) = 01) is selected. This bit
defines the CMI precoding and influences transmit and receive data.
0 =
1 =
Note: Before local loop is selected, HDB3 precoding has to be
Receive S
Only valid if multiframe format (FMR2.RFS(1:0) = 1x) is selected.
0 =
1 =
H
Normal operation.
A one in this bit position causes the transmitter to replace
normal transmit data with the LLB down (deactivate) Code
continuously until this bit is reset. The LLB down Code is
optionally overwritten by the time slot 0 depending on bit
LCR1.FLLB.
Normal operation.
A one in this bit position causes the transmitter to replace
normal transmit data with the LLB UP Code continuously until
this bit is reset. The LLB UP Code is overwritten by the time slot
0 depending on bit LCR1.FLLB. For proper operation bit
FMR3.XLD must be cleared.
disabled.
CMI with HDB3 precoding
CMI without HDB3 precoding
The detection of the predefined S
S
independently of the multiframe synchronous state.
The detection of the S
the multiframe.
a
6-bit detection according to ETS 300233) is done
XLD
a
6-Access Synchronous Mode
XLU
245
CMI
a
6-bit pattern is done synchronously to
SA6SY
a
6-bit pattern (refer to chapter
EXTIW
FALC56 V1.2
E1 Registers
0
PEB 2256
2002-08-27
(31)
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