PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 343
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PEB2256H-V12
Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2256H-V12.pdf
(490 pages)
Specifications of PEB2256H-V12
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN
PEB2256H-V12IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
- Current page: 343 of 490
- Download datasheet (6Mb)
Transmit Time Slot Register 1 to 4 (Read/Write)
Value after reset: 00
TTR1
TTR2
TTR3
TTR4
TS(31:0)
Data Sheet
TS16
TS24
TS0
TS8
7
Transmit Time Slot Register
These bits define the transmit time slots on the system highway to be
inserted. Additionally these registers control the XSIGM marker which
can be forced high during the corresponding time slots independently
of bit CCR1.EITS.
A one in the TTR(4:1) bits inserts the corresponding time slot sourced
by the XFIFO in the data received on pin XDI, if bit CCR1.EITS is set.
If SIC3.TTRF is set and CCR1.EDLX/EITS = 00, insertion of data
received on port XSIG is controlled by this registers.
Assignments:
SIC2.SSC2 = 0: (32 time slots/frame)
TS0
SIC2.SSC2 = 1: (24 time slots/frame)
TS0
0
1 =
TS17
TS25
TS1
TS9
H
, 00
The selected time slot is not inserted into the outgoing data
stream.
The contents of the selected time slot is inserted into the
outgoing data stream from XFIFO. This function is only active,
if bits CCR1.EITS is set.
The corresponding time slot are forced high on marker pin
XSIGM.
H
, 00
time slot 0, TS31
time slot 0, TS23
TS10
TS18
TS26
TS2
H
, 00
H
TS11
TS19
TS27
TS3
343
TS12
TS20
TS28
TS4
time slot 31
time slot 23
TS13
TS21
TS29
TS5
TS14
TS22
TS30
TS6
T1/J1 Registers
FALC56 V1.2
TS15
TS23
TS31
TS7
0
PEB 2256
2002-08-27
(10)
(11)
(12)
(13)
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