ATmega168P Atmel Corporation, ATmega168P Datasheet - Page 17

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ATmega168P

Manufacturer Part Number
ATmega168P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega168P

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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8. AVR Memories
8.1
8.2
8025M–AVR–6/11
Overview
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the ATmega48P/88P/168P. The AVR architec-
ture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega48P/88P/168P features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
The ATmega48P/88P/168P contains 4/8/16 bytes On-chip In-System Reprogrammable Flash
memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is orga-
nized as 2/4/8 x 16. For software security, the Flash Program memory space is divided into two
sections, Boot Loader Section and Application Program Section in ATmega88P and
ATmega168P. ATmega48P does not have separate Boot Loader and Application Program sec-
tions, and the SPM instruction can be executed from the entire Flash. See SELFPRGEN
description in section
273
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega48P/88P/168P Program Counter (PC) is 11/12/13 bits wide, thus addressing the 2/4/8
program memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in
on page 267
and ATmega168P” on page
description on Flash Programming in SPI- or Parallel Programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
and
page
14.
and
289for more details.
”Boot Loader Support – Read-While-Write Self-Programming, ATmega88P
”SPMCSR – Store Program Memory Control and Status Register” on page
275.
”Memory Programming” on page 291
”Self-Programming the Flash, ATmega48P”
ATmega48P/88P/168P
”Instruction Execution Tim-
contains a detailed
17

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