ATmega168P Atmel Corporation, ATmega168P Datasheet - Page 305

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ATmega168P

Manufacturer Part Number
ATmega168P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega168P

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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28.8.1
28.8.2
8025M–AVR–6/11
Serial Programming Pin Mapping
Serial Programming Algorithm
Table 28-15. Pin Mapping Serial Programming
When writing serial data to the ATmega48P/88P/168P, data is clocked on the rising edge of
SCK.
When reading data from the ATmega48P/88P/168P, data is clocked on the falling edge of SCK.
See
To program and verify the ATmega48P/88P/168P in the serial programming mode, the following
sequence is recommended (See Serial Programming Instruction set in
306):
1. Power-up sequence:
2. Wait for at least 20 ms and enable serial programming by sending the Programming
3. The serial programming instructions will not work if the communication is out of synchro-
4. The Flash is programmed one page at a time. The memory page is loaded one byte at a
5. A: The EEPROM array is programmed one byte at a time by supplying the address and
Apply power between V
tems, the programmer can not guarantee that SCK is held low during power-up. In this
case, RESET must be given a positive pulse of at least two CPU clock cycles duration
after SCK has been set to “0”.
Enable serial instruction to pin MOSI.
nization. When in sync. the second byte (0x53), will echo back when issuing the third
byte of the Programming Enable instruction. Whether the echo is correct or not, all four
bytes of the instruction must be transmitted. If the 0x53 did not echo back, give RESET a
positive pulse and issue a new Programming Enable command.
time by supplying the 6 LSB of the address and data together with the Load Program
Memory Page instruction. To ensure correct loading of the page, the data low byte must
be loaded before data high byte is applied for a given address. The Program Memory
Page is stored by loading the Write Program Memory Page instruction with the 7 MSB of
the address. If polling (RDY/BSY) is not used, the user must wait at least t
issuing the next page (See
before the Flash write operation completes can result in incorrect programming.
data together with the appropriate Write instruction. An EEPROM memory location is first
automatically erased before new data is written. If polling (RDY/BSY) is not used, the
user must wait at least t
chip erased device, no 0xFFs in the data file(s) need to be programmed.
B: The EEPROM array is programmed one page at a time. The Memory page is loaded
one byte at a time by supplying the 6 LSB of the address and data together with the Load
EEPROM Memory Page instruction. The EEPROM Memory Page is stored by loading
the Write EEPROM Memory Page Instruction with the 7 MSB of the address. When using
EEPROM page access only byte locations loaded with the Load EEPROM Memory Page
instruction is altered. The remaining locations remain unchanged. If polling (RDY/BSY) is
Figure 28-9
Symbol
MOSI
MISO
SCK
for timing details.
CC
WD_EEPROM
Pins
PB3
PB4
PB5
and GND while RESET and SCK are set to “0”. In some sys-
Table
28-16). Accessing the serial programming interface
before issuing the next byte (See
I/O
O
I
I
ATmega48P/88P/168P
Serial Data out
Serial Data in
Description
Table 28-17 on page
Serial Clock
Table
WD_FLASH
28-16). In a
before
305

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