ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 122

• Manufacturer Part Number: ATtiny167
• Manufacturer: Atmel Corporation

Specifications of ATtiny167

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

12.8.1
12.8.2
12.9
122
Modes of Operation
ATtiny87/ATtiny167
Compare Output Function
Compare Output Mode and Waveform Generation
Figure 12-6. Compare Match Output Logic
The general I/O port function is overridden by the Output Compare (OC1A/B) from the Wave-
form Generator if either of the COM1A/B[1:0] bits are set and if OCnxi respective bit is set in
TCCR1D register. However, the OC1A/Bi pin direction (input or output) is still controlled by the
Data Direction Register (DDR) for the port pin. The Data Direction Register bit for the OC1A/Bi
pin (DDR_OC1A/Bi) must be set as output before the OC1A/B value is visible on the pin. The
port override function is generally independent of the Waveform Generation mode, but there
are some exceptions. Refer to
The design of the Output Compare pin logic allows initialization of the OC1A/B state before the
output is enabled. Note that some COM1A/B[1:0] bit settings are reserved for certain modes of
operation.
The COM1A/B[1:0] bits have no effect on the Input Capture unit.
The Waveform Generator uses the COM1A/B[1:0] bits differently in normal, CTC, and PWM
modes. For all modes, setting the COM1A/B[1:0] = 0 tells the Waveform Generator that no
action on the OC1A/B Register is to be performed on the next compare match. For compare
output actions in the non-PWM modes refer to
refer to
refer to
A change of the COM1A/B[1:0] bits state will have effect at the first compare match after the
bits are written. For non-PWM modes, the action can be forced to have immediate effect by
using the FOC1A/B strobe bits.
The mode of operation, i.e., the behavior of the Timer/Counter and the Output Compare pins,
is defined by the combination of the Waveform Generation mode (WGM1[3:0]) and Compare
Output mode (COM1A/B[1:0]) bits. The Compare Output mode bits do not affect the counting
sequence, while the Waveform Generation mode bits do. The COM1A/B[1:0] bits control
whether the PWM output generated should be inverted or not (inverted or non-inverted PWM).
For non-PWM modes the COM1A/B[1:0] bits control whether the output should be set, cleared
Table 12-2 on page
Table 12-3 on page
See “Register Description” on page 132.
FOCnx
COMnx1
COMnx0
clk
I/O
Waveform
Generator
133, and for phase correct and phase and frequency correct PWM
133.
Table
OCnxi
12-1,
D
D
PORT
D
DDR
Table 12-2
OCnx
Q
Q
Q
Table 12-1 on page
and
1
0
Table 12-3
132. For fast PWM mode
for details.
OCnxi
Pin
8265B–AVR–09/10