ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 193

• Manufacturer Part Number: ATtiny167
• Manufacturer: Atmel Corporation

Specifications of ATtiny167

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

17.3
8265B–AVR–09/10
Operation
The ADC converts an analog input voltage to a 10-bit digital value through successive approx-
imation. The minimum value represents AGND and the maximum value represents the voltage
on AV
The voltage reference for the ADC may be selected by writing to the REFS[1:0] bits in ADMUX
and AREFEN bit in AMISCR. The AV
age reference may be selected as the ADC voltage reference.
The analog input channel and differential gain are selected by writing to the MUX[4:0] bits in
ADMUX register. Any of the 11 ADC input pins ADC[10:0] can be selected as single ended
inputs to the ADC. The positive and negative inputs to the differential gain amplifier are
described in
If differential channels are selected, the differential gain stage amplifies the voltage difference
between the selected input pair by the selected gain factor 8x or 20x, according to the setting
of the MUX[4:0] bits in ADMUX register. This amplified value then becomes the analog input to
the ADC. If single ended channels are used, the gain amplifier is bypassed altogether.
The on-chip temperature sensor is selected by writing the code defined in
MUX[4:0] bits in ADMUX register when its dedicated ADC channel is used as an ADC input.
A specific ADC channel (defined in
ies of an external resistance flowing by a current driving by the Internal Current Source
(ISRC).
The ADC is enabled by setting the ADC Enable bit, ADEN in ADCSRA register. Voltage refer-
ence and input channel selections will not go into effect until ADEN is set. The ADC does not
consume power when ADEN is cleared, so it is recommended to switch off the ADC before
entering power saving sleep modes.
The ADC generates a 10-bit result which is presented in the ADC Data Registers, ADCH and
ADCL. By default, the result is presented right adjusted, but can optionally be presented left
adjusted by setting the ADLAR bit in ADMUX register.
If the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read
ADCH. Otherwise, ADCL must be read first, then ADCH, to ensure that the content of the data
registers belongs to the same conversion. Once ADCL is read, ADC access to data registers
is blocked. This means that if ADCL has been read, and a conversion completes before ADCH
is read, neither register is updated and the result from the conversion is lost. When ADCH is
read, ADC access to the ADCH and ADCL Registers is re-enabled.
The ADC has its own interrupt which can be triggered when a conversion completes. When
ADC access to the data registers is prohibited between reading of ADCH and ADCL, the inter-
rupt will trigger even if the result is lost.
CC
, the voltage refrence on AREF pin or an internal 1.1V / 2.56V voltage reference.
Table
17-5.
Table
CC
supply, the AREF pin or an internal 1.1V / 2.56V volt-
17-5) is used to measure the voltage to the boundar-
Table 17-5
to the
193