ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 36

• Manufacturer Part Number: ATtiny167
• Manufacturer: Atmel Corporation

Specifications of ATtiny167

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

36
ATtiny87/ATtiny167
Here is a “light” C-code of a clock switching function using automatic clock monitoring.
C Code Example
void ClockSwiching (unsigned char clk
#define CLOCK
#define CLOCK
#define CLOCK
#define CLOCK
#define WD
#define WD
unsigned char previous
}
}
// Disable interrupts
// Save the current system clock source
// Enable the new clock source
// Wait for clock validity
// Switch clock source
// Wait for effective switching
// Shut down unneeded clock source
// Re-enable interrupts
// Enable the watchdog in automatic reload mode
temp = SREG; asm ("cli");
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
previous
CLKSELR = ((sut << 4 ) & 0x30) | (clk
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
while ((CLKCSR & (1 << CLKRDY)) == 0);
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
while (1){
}
if (previous_clk != (clk_number & 0x0F)) {
CLKSELR = previous
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
SREG = temp;
WDTCSR = (1 << WDCE) | (1 << WDE);
WDTCSR = (1 << WDE ) | WD
CLKCSR = 1 << CLKCCE;
CLKCSR = WD
CLKCSR = 1 << CLKCCE;
CLKCSR = CLOCK
if ((CLKSELR & 0x0F) == (clk
_
_
ARL
2048CYCLES
_
clk = CLKSELR & 0x0F;
_
_
_
_
RECOVER
ENABLE
SWITCH
DISABLE
_
_
ENABLE
ARL
_
_
_
_
RECOVER;
ENABLE;
_
SWITCH;
DISABLE;
ENABLE;
_
_
RECOVER;
_
clk;
clk, temp;
0x05
0x02
0x04
0x01
0x06
0x07
_
2048CYCLES;
_
number & 0x0F)) break;
_
number, unsigned char sut) {
_
number & 0x0F);
8265B–AVR–09/10