ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 132

• Manufacturer Part Number: ATtiny167
• Manufacturer: Atmel Corporation

Specifications of ATtiny167

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

12.11 Register Description
12.11.1
132
ATtiny87/ATtiny167
TCCR1A – Timer/Counter1 Control Register A
Figure 12-14. Timer/Counter Timing Diagram, with Prescaler (f
• Bits 7:6 – COM1A[1:0]: Compare Output Mode for Channel A
• Bits 5:4 – COM1B[1:0]: Compare Output Mode for Channel B
The COM1A[1:0] and COM1B[1:0] control the Output Compare pins (OC1Ai and OC1Bi
respectively) behavior. If one or both of the COM1A[1:0] bits are written to one, the OC1Ai out-
put overrides the normal port functionality of the I/O pin it is connected to. If one or both of the
COM1B[1:0] bit are written to one, the OC1Bi output overrides the normal port functionality of
the I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit and
OC1xi bit (TCCR1D) corresponding to the OC1Ai or OC1Bi pin must be set in order to enable
the output driver.
When the OC1Ai or OC1Bi is connected to the pin, the function of the COM1A/B[1:0] bits is
dependent of the WGM1[3:0] bits setting.
when the WGM1[3:0] bits are set to a Normal or a CTC mode (non-PWM).
Table 12-1.
Bit
(0x80)
Read/Write
Initial Value
OC1Ai
OC1Bi
0
1
and ICF n
(PC and PFC PWM)
TOVn
(CTC and FPWM)
(Update at TOP)
COM1A1
COM1B1
TCNTn
TCNTn
(clk
as TOP)
clk
OCRnx
clk
COM1A1
I/O
(FPWM)
I/O
Tn
/8)
Compare Output Mode, non-PWM
R/W
(if used
x
0
0
1
1
7
0
COM1A0
R/W
COM1A0
COM1B0
6
0
x
0
1
0
1
TOP - 1
TOP - 1
Old OCRnx Value
COM1B1
R/W
5
0
Description
Normal port operation, OC1A/OC1B disconnected.
Toggle OC1A/OC1B on Compare Match.
Clear OC1A/OC1B on Compare Match (Set output to low
level).
Set OC1A/OC1B on Compare Match (Set output to high level).
COM1B0
Table 12-1
R/W
4
0
TOP
TOP
shows the COM1A/B[1:0] bit functionality
3
–
R
0
BOTTOM
TOP - 1
R
2
–
0
clk_I/O
New OCRnx Value
/8)
WGM11
R/W
1
0
BOTTOM + 1
TOP - 2
WGM10
R/W
8265B–AVR–09/10
0
0
TCCR1A