ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 30

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ATtiny167

Manufacturer Part Number
ATtiny167
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny167

Flash (kbytes)
16 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
16
Ext Interrupts
16
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
3
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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4.2.6
30
ATtiny87/ATtiny167
External Clock
Figure 4-3.
When this oscillator is selected, start-up times are determined by the SUT fuses or by CSUT
field as shown in
Table 4-8.
Notes:
To drive the device from this external clock source, CLKI should be driven as shown in
4-4. To run the device on an external clock, the CKSEL Fuses or CSEL field must be pro-
grammed as shown in
Figure 4-4.
When this clock source is selected, start-up times are determined by the SUT Fuses or CSUT
field as shown in
This external clock can be used by the asynchronous timer if the high or low frequency Crystal
Oscillator is not running
timer is then able to enable this input.
CSUT[1:0]
SUT[1:0]
00
01
10
11
1. Flash Fuse bits.
2. CLKSELR register bits.
3. These options should only be used if frequency stability at start-up is not important for the
(1)
application.
(2)
Low-frequency Crystal Oscillator Connections
Start-up Times for the Low Frequency Crystal Oscillator Clock Selection
External Clock Drive Configuration
Start-up Time from
Power-down/save
Table
Table
32K (32768) CK
1K (1024) CK
1K (1024) CK
Table 4-1 on page
4-8.
4-9.
(See ”Enable/Disable Clock Source” on page
12-22 pF capacitors may be necessary if parasitic
impedance (pads, wires & PCB) is very low.
(3)
(3)
External
32.768 KHz
Signal
Clock
~
C1=12-22 pF
C2=12-22 pF
Additional Delay from
Reset (V
25.
4.1 ms
65 ms
65 ms
CC
= 5.0V)
Reserved
(XTAL2)
(XTAL1)
(CLKO)
CLKI
GND
XTAL2
XTAL1
GND
Recommended usage
Fast rising power or BOD enabled
Slowly rising power
Stable frequency at start-up
32.). The asynchronous
8265B–AVR–09/10
Figure

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