ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 171
ATtiny167
Manufacturer Part Number
ATtiny167
Description
Manufacturer
Atmel Corporation
Specifications of ATtiny167
Flash (kbytes)
16 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
16
Ext Interrupts
16
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
3
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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15.5.4
15.5.5
15.5.5.1
8265B–AVR–09/10
1) LBUSY
2) LBUSY
3) LBUSY
LIN bus
Configuration
Busy Signal
Busy Signal in LIN Mode
LCMD=Tx Header
BREAK
Depending on the mode (LIN or UART), LCONF[1:0] bits of the LINCR register set the control-
ler in the following configuration
Table 15-3.
The LIN configuration is independent of the programmed LIN protocol.
The listening mode connects the internal Tx LIN and the internal Rx LIN together. In this
mode, the TXLIN output pin is disabled and the RXLIN input pin is always enabled. The same
scheme is available in UART mode.
Figure 15-6. Listening Mode
LBUSY bit flag in LINSIR register is the image of the BUSY signal. It is set and cleared by
hardware. It signals that the controller is busy with LIN or UART communication.
Figure 15-7. Busy Signal in LIN Mode
Node providing the master task
UART
Mode
Field
LIN
HEADER
LCONF[1:0]
SYNC
Configuration Table versus Mode
00
01
10
00
01
10
11
11
b
b
b
b
b
b
b
b
Node providing neither the master task, neither a slave task
Field
LISTEN
Rx LIN
Tx LIN
internal
internal
PROTECTED
IDENTIFIER
LIDOK
(Table
Field
FRAME SLOT
Listening mode, 8-bit data, no parity & 1 stop-bit
1
0
15-3):
No CRC field detection or transmission
LIN standard configuration (default)
LCMD=Tx or Rx Response
8-bit data, even parity & 1 stop-bit
8-bit data, odd parity & 1 stop-bit
DATA-0
8-bit data, no parity & 1 stop-bit
Frame_Time_Out disable
Field
Listening mode
Configuration
Node providing a slave task
RESPONSE
RXLIN
TXLIN
DATA-n
Field
LTXOK or LRXOK
CHECKSUM
Field
171
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