ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 25

• Manufacturer Part Number: ATtiny167
• Manufacturer: Atmel Corporation

Specifications of ATtiny167

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

4.1.1
4.1.2
4.1.3
4.1.4
4.1.5
4.2
8265B–AVR–09/10
Clock Sources
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
Asynchronous Timer Clock – clk
ADC Clock – clk
I/O
CPU
ADC
The CPU clock is routed to parts of the system concerned with the AVR core operation. Exam-
ples of such modules are the General Purpose Register File, the Status Register and the Data
memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like synchronous Timer/Counter. The
I/O clock is also used by the External Interrupt module, but note that some external interrupts
are detected by asynchronous logic, allowing such interrupts to be detected even if the I/O
clock is halted.
The Flash clock controls operation of the Flash interface. The Flash clock is usually active
simultaneously with the CPU clock.
The asynchronous timer clock allows the asynchronous Timer/Counter to be clocked directly
from an external clock or an external low frequency crystal. The dedicated clock domain
allows using this Timer/Counter as a real-time counter even when the device is in sleep mode.
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O
clocks in order to reduce noise generated by digital circuitry. This gives more accurate ADC
conversion results.
The device has the following clock source options, selectable by Flash Fuse bits (default) or
by the CLKSELR register (dynamic clock switch circuit) as shown below. The clock from the
selected source is input to the AVR clock generator, and routed to the appropriate modules.
Table 4-1.
Notes:
FLASH
Device Clocking Option
External Clock
Calibrated Internal RC Oscillator 8.0 MHz
Watchdog Oscillator 128 kHz
External Low-frequency Oscillator
External Crystal/Ceramic Resonator (0.4 - 0.9 MHz)
External Crystal/Ceramic Resonator (0.9 - 3.0 MHz)
External Crystal/Ceramic Resonator (3.0 - 8.0 MHz)
External Crystal/Ceramic Resonator (8.0 - 16.0 MHz)
1. For all fuses “1” means unprogrammed while “0” means programmed.
2. Flash Fuse bits.
3. CLKSELR register bits.
Device Clocking Options Select
ASY
(1)
vs. PB4 and PB5 Functionality
CKSEL[3:0]
CSEL[3:0]
0000
0010
0011
100x
101x
01xx
110x
111x
b
b
b
b
b
b
b
b
(3)
(2)
XTAL1
XTAL1
XTAL1
XTAL1
XTAL1
CLKI
PB4
I/O
I/O
CLKO - I/O
CLKO - I/O
CLKO - I/O
XTAL2
XTAL2
XTAL2
XTAL2
XTAL2
PB5
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