ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 89

• Manufacturer Part Number: ATtiny167
• Manufacturer: Atmel Corporation

Specifications of ATtiny167

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.2.1
10.3
10.4
8265B–AVR–09/10
Timer/Counter Clock Sources
Counter Unit
Definitions
The following definitions are used extensively throughout the section:
The Timer/Counter can be clocked by an internal synchronous or an external asynchronous
clock source. The clock source is selected by the clock select logic which is controlled by the
clock select (CS0[2:0]) bits located in the Timer/Counter control register (TCCR0).The clock
source clk
ter is written to logic one, the clock source is taken from the Timer/Counter Oscillator
connected to XTAL1 and XTAL2 or directly from XTAL1. For details on asynchronous opera-
tion, see
and prescaler, see
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
ure 10-2
Figure 10-2. Counter Unit Block Diagram
Signal description (internal signals):
BOTTOM
MAX
TOP
count
direction
clear
clk
top
bottom
shows a block diagram of the counter and its surrounding environment.
T
“ASSR – Asynchronous Status Register” on page
T
0
DATA BUS
0 is by default equal to the MCU clock, clk
TCNTn
The counter reaches the BOTTOM when it becomes zero (0x00).
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest value in
the count sequence. The TOP value can be assigned to be the fixed value
0xFF (MAX) or the value stored in the OCR0A Register. The assignment is
dependent on the mode of operation.
“Timer/Counter0 Prescaler” on page
direction
Increment or decrement TCNT0 by 1.
Selects between increment and decrement.
Clear TCNT0 (set all bits to zero).
Timer/Counter0 clock.
Signalizes that TCNT0 has reached maximum value.
Signalizes that TCNT0 has reached minimum value (zero).
count
clear
bottom
Control Logic
top
TOVn
(Int.Req.)
clk
Tn
Prescaler
I/O
. When the AS0 bit in the ASSR Regis-
100.
clk
103. For details on clock sources
TnS
Oscillator
clk
I/O
XTAL2
XTAL1
Fig-
89