ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 21

• Manufacturer Part Number: ATtiny167
• Manufacturer: Atmel Corporation

Specifications of ATtiny167

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

3.4
3.4.1
3.5
3.5.1
8265B–AVR–09/10
I/O Memory
Register Description
General Purpose I/O Registers
EEARH and EEARL – EEPROM Address Register
The I/O space definition of the ATtiny87/167 is shown in
page
All ATtiny87/167 I/Os and peripherals are placed in the I/O space. All I/O locations may be
accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32
general purpose working registers and the I/O space. I/O Registers within the address range
0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers,
the value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the
instruction set section for more details. When using the I/O specific commands IN and OUT,
the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space
using LD and ST instructions, 0x20 must be added to these addresses. The ATtiny87/167 is a
complex microcontroller with more peripheral units than can be supported within the 64 loca-
tion reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from
0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can there-
fore be used on registers containing such Status Flags. The CBI and SBI instructions work
with registers 0x00 to 0x1F only.
The I/O and Peripherals Control Registers are explained in later sections.
The ATtiny87/167 contains three General Purpose I/O Registers. These registers can be used
for storing any information, and they are particularly useful for storing global variables and Sta-
tus Flags.
The General Purpose I/O Registers within the address range 0x00 - 0x1F are directly
bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
• Bits 7:1 – Res: Reserved Bits
These bits are reserved for future use and will always read as 0 in ATtiny87/167.
Bit
0x22 (0x42)
0x21 (0x41)
Bit
Read/Write
Read/Write
Initial Value
Initial Value
protection circuit can be used. If a reset occurs while a write operation is in progress, the
write operation will be completed provided that the power supply voltage is sufficient.
271.
EEAR7
R/W
R
X
7
–
7
0
EEAR6
R/W
R
X
6
–
6
0
EEAR5
R/W
R
0
X
5
–
5
EEAR4
R/W
R
X
4
–
4
0
EEAR3
R/W
R
X
3
–
3
0
Section 24. “Register Summary” on
EEAR2
R/W
R
X
2
–
2
0
EEAR1
R/W
R
1
–
1
0
X
EEAR8
EEAR0
R/W
R/W
X
X
0
0
EEARH
EEARL
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