ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 96

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ATtiny167

Manufacturer Part Number
ATtiny167
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny167

Flash (kbytes)
16 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
16
Ext Interrupts
16
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
3
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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96
ATtiny87/ATtiny167
Figure 10-7. Phase Correct PWM Mode, Timing Diagram
The Timer/Counter Overflow Flag (TOV0) is set each time the counter reaches BOTTOM. The
interrupt flag can be used to generate an interrupt each time the counter reaches the BOT-
TOM value.
In phase correct PWM mode, the compare unit allows generation of PWM waveforms on the
OC0A pin. Setting the COM0A[1:0] bits to two will produce a non-inverted PWM. An inverted
PWM output can be generated by setting the COM0A[1:0] to three (See
101). The actual OC0A value will only be visible on the port pin if the data direction for the port
pin is set as output. The PWM waveform is generated by clearing (or setting) the OC0A Regis-
ter at the compare match between OCR0A and TCNT0 when the counter increments, and
setting (or clearing) the OC0A Register at compare match between OCR0A and TCNT0 when
the counter decrements. The PWM frequency for the output when using phase correct PWM
can be calculated by the following equation:
The N variable represents the prescale factor (1, 8, 32, 64, 128, 256, or 1024).
The extreme values for the OCR0A Register represent special cases when generating a PWM
waveform output in the phase correct PWM mode. If the OCR0A is set equal to BOTTOM, the
output will be continuously low and if set equal to MAX the output will be continuously high for
non-inverted PWM mode. For inverted PWM the output will have the opposite logic values.
TCNTn
OCnx
OCnx
Period
1
f
OCnxPCPWM
2
=
----------------- -
N 510
f
clk_I/O
3
OCnx Interrupt Flag Set
OCRnx Update
TOVn Interrupt Flag Set
(COMnx1:0 = 2)
(COMnx1:0 = 3)
Table 10-3 on page
8265B–AVR–09/10

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