ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 253

• Manufacturer Part Number: ATtiny167
• Manufacturer: Atmel Corporation

Specifications of ATtiny167

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

22.10 SPI Timing Characteristics
8265B–AVR–09/10
See
Table 22-12. SPI Timing Parameters
Note:
Figure 22-6. SPI Interface Timing Requirements (Master Mode)
10
12
13
14
15
16
17
18
11
(Data Output)
1
2
3
4
5
6
7
8
9
(Data Input)
(CPOL = 0)
(CPOL = 1)
Figure 22-6
In SPI Programming mode the minimum SCK high/low period is:
- 2 t
- 3 t
MISO
MOSI
SCK
SCK
SS
SS high to tri-state
CLCL
CLCL
SCK high/low
SCK to out high
SCK to SS high
SS low to SCK
SCK high/low
Rise/Fall time
Rise/Fall time
SS low to out
Description
SCK period
Out to SCK
SCK period
SCK to out
SCK to out
for f
for f
and
Setup
Setup
Hold
Hold
CK
CK
Figure 22-7
< 12 MHz
>12 MHz
6
4
MSB
(1)
5
MSB
for details.
Master
Master
Master
Master
Master
Master
Master
Master
7
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
...
...
4 • t
2 • t
2 • t
Min.
10
20
t
ck
ck
ck
ck
See
50% duty cycle
2
0.5 • t
Table 13-4
Typ.
LSB
3.6
10
10
10
15
15
10
10
1
sck
LSB
2
3
8
Max.
1.6
ns
µs
ns
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