ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 75

• Manufacturer Part Number: ATtiny167
• Manufacturer: Atmel Corporation

Specifications of ATtiny167

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

9.3.1
9.3.2
8265B–AVR–09/10
MCUCR – MCU Control Register
PORTCR – Port Control Register
• Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0, 1). See
figuring the Pin” on page 68
• Bits 5:4 – BBMx: Break-Before-Make Mode Enable
When these bits are written to one, the port-wise Break-Before-Make mode is activated. The
intermediate tri-state cycle is then inserted when writing DDRxn to make an output. For further
information, see
• Bits 1:0 – PUDx: Port-Wise Pull-up Disable
When these bits are written to one, the port-wise pull-ups in the defined I/O ports are disabled
even if the DDxn and PORTxn Registers are configured to enable the pull-ups
({DDxn, PORTxn} = 0, 1). The Port-Wise Pull-up Disable bits are ORed with the global Pull-up
Disable bit (PUD) from the MCUCR register. See
details about this feature.
Bit
0x35 (0x55)
Read/Write
Initial Value
Bit
0x12 (0x32)
Read/Write
Initial Value
R
R
7
–
0
7
–
0
“Break-Before-Make Switching” on page
BODS
R/W
R
6
0
6
–
0
for more details about this feature.
BODSE
BBMB
R/W
R/W
5
0
5
0
BBMA
PUD
R/W
R/W
4
0
4
0
“Configuring the Pin” on page 68
R
3
–
0
R
3
–
0
69.
R
R
2
–
0
2
–
0
PUDB
R/W
R
1
–
0
1
0
PUDA
R/W
R
0
–
0
0
0
for more
PORTCR
MCUCR
“Con-
75