r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 177

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 11.7
11.4.8
11.4.9
When the REIT instruction is executed at the end of an interrupt routine, the FLG register and PC, which have
been saved on the stack, are restored. Then, the processing before acknowledgement of the interrupt request
starts again.
The registers saved by a program in the interrupt routine should be restored using the POPM or similar
instruction before executing the REIT instruction.
If two or more interrupt requests are generated while a single instruction is being executed, the interrupt with
the higher priority is acknowledged.
Any maskable interrupt (peripheral function) priority level can be selected by bits ILVL0 to ILVL2. However, if
two or more maskable interrupts have the same priority level, the interrupt with higher priority given by
hardware is acknowledged.
The priority of special interrupts such as the watchdog timer interrupt is set by hardware.
Figure 11.7 shows the Hardware Interrupt Priority.
Software interrupts are not affected by the interrupt priority. If a software interrupt instruction is executed, the
MCU will execute the corresponding interrupt routine.
Returning from Interrupt Routine
Interrupt Priority
Preliminary document
Specifications in this document are tentative and subject to change.
Hardware Interrupt Priority
Oscillation stop detection
Peripheral function
Voltage monitor 1
Voltage monitor 2
Watchdog timer
Address match
Address break
Single step
Reset
High
Low
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11. Interrupts