r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 305
r5f21368sdfp
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r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F21368SDFP.pdf
(760 pages)
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R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
17. Timer RC
Timer RC is a 16-bit timer that provides output compare and input capture functions and can count external events. It
can be used as a multifunction timer with various applications such as generation of pulse output with an arbitrary duty
cycle using the compare match between the timer RC counter and four general registers.
17.1
Table 17.1
Count sources
(counter input
clocks)
Pulse I/O pins
General registers
Operating modes
Interrupt sources
Others
Table 17.1 lists the Timer RC Specifications, Table 17.2 lists the Timer RC Functions, Figure 17.1 shows the Timer
RC Block Diagram, and Table 17.3 lists Timer RC Pin Configuration.
Overview
Item
Preliminary document
Specifications in this document are tentative and subject to change.
Timer RC Specifications
Internal clock
External clock
(external event
count)
Timer mode
PWM mode
PWM2 mode
4
• Output compare function:
• Input capture function:
• Counter clear function: A count period can be set.
• Compare match/input capture multiplexed interrupt × 4 sources
• Overflow interrupt
• The initial value of the timer RC output can be set arbitrarily.
• A/D conversions triggered by compare matches in registers TRCGRA,
• Timer RC can cooperate with the event link controller (ELC) or the DTC.
• f1, f2, f4, f8, or f32:
• fHOCO: Selected when bits CKS2 to CKS0 in the TRCCR1 register are 110b.
• fHOCO-F: Selected when bits CKS2 to CKS0 in the TRCCR1 register are
TRCCLK input:
Selected when bits CKS2 to CKS0 in the TRCCR1 register are 101b.
4
• Can be set as output compare or input capture registers individually.
• Can be used as buffer registers for output compare or input capture.
PWM output with up to three phases.
Pulse output with an arbitrary period and duty.
Selected when bits CKS2 to CKS0 in the TRCCR1 register are 000b to 100b.
111b.
Low-level, high-level, or toggle output can be performed.
A rising edge, falling edge, or both edges can be detected.
TRCGRB, TRCGRC, and TRCGRD can be set.
Description
Page 274 of 725
17. Timer RC
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