r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 553

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
22.4
Figure 22.2
22.4.1
Figure 22.2 shows an Operation Example during Header Field Transmission master mode. Figures 22.3 and
22.4 show Header Field Transmission Flowchart Example.
During header field transmission, the hardware LIN operates as follows:
(1) When 1 (count starts) is written to the TSTART bit in the TRJCR register of timer RJ, the TXD pin outputs
(2) When timer RJ underflows, the TXD pin output is inverted and the SBDCT bit in the LINST register is set
(3) The hardware LIN transmits 55h via UART0.
(4) After the hardware LIN completes transmitting 55h, it transmits an ID field via UART0.
(5) After the hardware LIN completes transmitting the ID field, it performs communication for a response
LINST register
TRJIC register
SBDCT bit in
Operation
a low level for the period set in the TRJ register of timer RJ.
to 1 (Synch Break is detected or Synch Break generation is completed). If the SBIE bit in the LINCT
register is set to 1 (Synch Break detection interrupt enabled), a timer RJ interrupt is generated.
field.
Master Mode
TXD pin
IR bit in
Preliminary document
Specifications in this document are tentative and subject to change.
Operation Example during Header Field Transmission
The above diagram applies under the following condition:
LINE = 1, MST = 1, SBIE = 1
(1)
Synch Break
(2)
(3)
1 is written to B1CLR
bit in LINST register
Set to 0 by acknowledgment of an
interrupt request or by a program
Synch Field
(4)
IDENTIFIER
22. Hardware LIN
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(5)