r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 519

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 21.16
21.3.3.4
When the MS bit in the SIMR2 register is set to 1 (4-wire bus communication mode) and the CSS1 bit is set to
1 (functions as the SCS output pin), set the MST bit in the SICR1 register to 1 (master mode) and check the
arbitration of the SCS pin before starting serial transfer. If the synchronous serial communication unit detects
that the synchronized internal SCS signal is held low in this period, the CE_ADZ bit in the SISR register is set
to 1 (conflict error) and the MST bit is automatically set to 0 (slave mode).
Figure 21.16 shows the Arbitration Check Timing.
Future transmit operations are not performed while the CE_ADZ bit in the SISR register is 1. Set the CE_ADZ
bit to 0 (no conflict error) before starting transmission.
(synchronization)
SICR1 register
Transfer start
Internal SCS
SCS output
SCS input
MST bit in
Preliminary document
Specifications in this document are tentative and subject to change.
SCS Pin Control and Arbitration
Arbitration Check Timing
CE
High-impedance
During arbitration detection
SITDR register
Data write to
Maximum time for SCS internal
synchronization
21. Clock Synchronous Serial Interface
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