r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 501

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
21.3
21.3.1
21.3.1.1
21.3.1.2
The transfer clock can be selected from among seven internal clocks (f1/256, f1/128, f1/64, f1/32, f1/16, f1/8,
and f1/4) and an external clock.
To use the synchronous serial communication unit, set the SCKS bit in the SIMR2 register to 1 and then select
the SSCK pin as the serial clock pin.
When the MST bit in the SICR1 register is 1 (master mode), an internal clock is selected and the SSCK pin
functions as output. When transfer is started, the SSCK pin outputs a clock of the transfer rate selected by bits
CKS0 to CKS2 in the SICR1 register.
When the MST bit is 0 (slave mode), an external clock is selected and the SSCK pin functions as input.
The association between the transfer clock polarity, phase and data changes according to the combinations of
the MS bit in the SIMR2 register and bits CPHS and CPOS_WAIT in the SIMR1 register. Figure 21.4 shows the
Association between Transfer Clock Polarity, Phase, and Transfer Data.
Also, MSB-first transfer or LSB-first transfer can be selected by setting the MLS bit in the SIMR1 register.
When the MLS bit is 1, transfer is started from the LSB and proceeds to the MSB. When the MLS bit is 0,
transfer is started from the MSB and proceeds to the LSB.
Synchronous Serial Communication Unit (SSU) Operation
Items Common to Clock Synchronous Communication Mode and 4-Wire
Bus Communication Mode
Preliminary document
Specifications in this document are tentative and subject to change.
Transfer Clock
Association between Transfer Clock Polarity, Phase, and Data
21. Clock Synchronous Serial Interface
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