r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 196

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Table 13.5
13.2.1
Note:
DTC Transfer Count Register 20
DTC Transfer Count Reload Register 20
DTC Source Address Register 20
DTC Destination Address Register 20
DTC Control Register 21
DTC Block Size Register 21
DTC Transfer Count Register 21
DTC Transfer Count Reload Register 21
DTC Source Address Register 21
DTC Destination Address Register 21
DTC Control Register 22
DTC Block Size Register 22
DTC Transfer Count Register 22
DTC Transfer Count Reload Register 22
DTC Source Address Register 22
DTC Destination Address Register 22
DTC Control Register 23
DTC Block Size Register 23
DTC Transfer Count Register 23
DTC Transfer Count Reload Register 23
DTC Source Address Register 23
DTC Destination Address Register 23
NMIF Bit (Non-maskable interrupt generation bit)
After Reset
1. This bit is set to 0 when the read result is 1 and then 0 is written to the same bit. This bit remains unchanged
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 00280h
even if the read result is 0 and then 0 is written to the same bit. This bit remains unchanged if 1 is written to it.
The NMIF bit is set to 1 when a watchdog timer interrupt, an oscillation stop detection interrupt, a voltage
monitor 1 interrupt, or a voltage monitor 2 interrupt is generated.
When the NMIF bit is 1, the DTC is not activated even if an interrupt which enables DTC activation is
generated. If the NMIF bit is changed to 1 during a DTC transfer, the transfer continues until it has completed.
Symbol
Symbol
Bit
NMIF
DTC Activation Control Register (DTCTL)
—
—
—
—
—
—
—
Preliminary document
Specifications in this document are tentative and subject to change.
DTC Register Configuration (4)
Register Name
b7
—
0
Reserved
Non-maskable interrupt generation bit
(1)
Nothing is assigned. The read value is 0.
b6
—
0
Bit Name
b5
—
0
b4
—
0
DTDAR20
DTCCR21
DTDAR21
DTCCR22
DTDAR22
DTCCR23
DTDAR23
DTCCT20
DTRLD20
DTSAR20
DTCCT21
DTRLD21
DTSAR21
DTCCT22
DTRLD22
DTSAR22
DTCCT23
DTRLD23
DTSAR23
DTBLS21
DTBLS22
DTBLS23
Symbol
b3
—
0
Set to 0.
0: Non-maskable interrupts not generated
1: Non-maskable interrupts generated
After Reset
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
b2
—
0
NMIF
Function
b1
0
Address
06CEAh
06CEBh
06CECh
06CEEh
06CFBh
06CFCh
06CFEh
06CE2h
06CE3h
06CE4h
06CE6h
06CE8h
06CE9h
06CF0h
06CF1h
06CF2h
06CF3h
06CF4h
06CF6h
06CF8h
06CF9h
06CFAh
b0
—
0
Access Size
Page 165 of 725
16
16
16
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
13. DTC
R/W
R/W
R/W
R